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This course provides an overview of software and hardware design for smart objects. It is mandatory in the Smart Objects track. Software and hardware aspects, system integration, design and validation tools are studied. The main goal is to reach a sufficient level of understanding to design alone a prototype system embedding one or several digital hardware operators for the processing and a micro-processor, plus its peripherals, for the control. A hands-on approach is taken, with the aid of state-of-the-art laboratory equipment. During the final project the students design an actual prototype on a FPGA-based prototyping board, design the embedded software, connect the board to a host PC and test their application.

A two hours written exam, with documents accounts for 50% of the overall mark. Connected devices (laptops, smartphones, tablets...) are not allowed. Example past exams:

The final project accounts for the remaining 50% of the overall mark. It is graded based on the individual and personal reports and source codes. Reports must be written in Markdown format in a file stored at the root of the project's dedicated directory. The day before the written exam, all reports and source codes must be pushed in your personal branch of the git repository (see below the section about labs for more information about the git repository). After this deadline the git repository will become read-only and there will be no way to submit anything new.

Recommendations for the lab sessions

The lab sessions take place in the GNU/Linux lab room 52 and 53. All labs are distributed and managed using git and GitLab.

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Books available in EURECOM's library

Online books

Standard VHDL packages